Credo Technology Group Holding Ltd is positioning its hardware portfolio to address the escalating bandwidth and power demands of AI scale-out and scale-up architectures. By showcasing a range of optical and copper interconnect products at the OCP Global Summit 2026 in San Jose, the company aims to demonstrate how its technologies manage the physical constraints of high-speed data movement. The upcoming demonstrations focus on bridging the gap between traditional copper distance limitations and the high cost of pluggable optics within massive AI clusters.
Credo Connectivity Portfolio for AI Scaling
At the OCP Global Summit, taking place October 12-15, Credo plans to demonstrate several technologies designed for GPU-intensive workloads. A central highlight is the micro-emitter NPO enabled optical backplane, developed in collaboration with SENKO, which the company claims delivers up to 10x higher bandwidth than current copper backplanes. Credo is also presenting its 1.6T ZeroFlap product line, which includes Active Light Cables (ALC) intended to fill mid-reach gaps, as well as 1.6T ZeroFlap Optics and Active Electrical Cables (AEC). These products integrate Credo’s ZeroFlap DSP and silicon photonics, utilizing the PILOT observability platform for real-time link telemetry and diagnostics. Additionally, the company will showcase the Toucan Gen6 PCIe AEC on the CWF Intel platform and the OmniConnect Weaver, an FPGA-implementation of its memory fanout gearbox designed to address the AI inference memory wall.
Addressing AI Infrastructure Interconnect Gaps
The company is targeting specific bottlenecks in AI cluster deployment through integrated hardware and software solutions. The 1.6T Cardinal DSP and Silicon Photonics (SiPho) integration aims to demonstrate multi-vendor live interoperability, a critical factor for enterprise data center flexibility. To support these physical layers, Credo is linking its hardware to the PILOT platform, which provides real-time functional testing, diagnostics, and fault analysis. This approach is intended to improve cluster returns by providing standardized transceiver telemetry. Furthermore, Credo is participating in the OCP Optics Reliability Workstream and presenting on extending Community SONiC for advanced optics telemetry. These efforts suggest a strategic focus on making high-speed interconnects more manageable and reliable as AI architectures move toward more complex, composable designs that require seamless chip-to-chip and rack-level connectivity.
Key Takeaways
- Credo is demonstrating a micro-emitter optical backplane with SENKO that reportedly offers up to 10x the bandwidth of latest copper backplanes.
- The 1.6T ZeroFlap product suite, including ALC and AEC, integrates ZeroFlap DSP and silicon photonics with the PILOT observability platform.
- The OmniConnect Weaver uses an FPGA-implementation of a memory fanout gearbox to target the AI inference memory wall.
TechInsyte's Take
In our view, Credo is attempting to solve the "interconnect tax"—the massive power and latency overhead required to move data between AI chips. By pushing 1.6T solutions and hybrid optical/copper architectures, the company is testing whether it can capture the middle ground of the connectivity market. The heavy emphasis on the PILOT observability platform suggests that Credo recognizes that hardware alone is no longer sufficient; enterprise operators require deep telemetry to manage the complexity of AI fabrics. If their silicon photonics and DSP integration can truly achieve multi-vendor interoperability, it could significantly lower the barrier for scaling massive, heterogeneous AI clusters.
Questions & Answers
How does Credo plan to address the distance limitations of copper in AI clusters?
Credo is introducing 1.6T ZeroFlap Active Light Cables (ALC) to bridge the mid-reach gap between the distance constraints of copper and the higher power/cost requirements of traditional pluggable optics.
What role does software play in Credo's connectivity strategy?
Credo is integrating its hardware with the PILOT observability platform, which provides real-time link telemetry, functional testing, diagnostics, and fault analysis to improve the reliability of AI interconnects.
How is Credo addressing the memory wall in AI inference?
The company is demonstrating the OmniConnect Weaver, which is an FPGA-implementation of its memory fanout gearbox, specifically designed to address the AI inference memory wall.
What is the strategic importance of the SENKO collaboration?
The collaboration with SENKO resulted in a micro-emitter blind-mate optical backplane architecture that Credo claims can deliver up to 10x higher bandwidth compared to current copper backplane technologies.
Source: Credo
