Analog Devices (ADI) is targeting the increasing computational demands of software-defined vehicles by integrating Cadence Tensilica DSP architecture into its next-generation SHARC automotive audio processors. This strategic move aims to address the growing complexity of in-vehicle acoustic and voice applications, which are shifting from traditional signal processing toward AI-driven models. By utilizing Cadence’s Tensilica Instruction Extension (TIE) technology, ADI is positioning its new ADSP-SC84x/2184x platform to handle high-performance workloads, such as real-time neural-network-based audio inference, directly at the edge. This architectural shift is designed to offload intensive tasks from the host CPU, ensuring that vehicle-domain and operating system functions remain uninterrupted while delivering enhanced system intelligence and richer audio experiences for future automotive platforms.
ADI Transitions to 16nm with SHARC-FX Core
The development of the SHARC-FX processor core represents a significant architectural leap for Analog Devices, moving from the previous ADSP-SC59x/2159x family to the new ADSP-SC84x/2184x platform. A primary driver of this evolution is the transition from 28nm to 16nm process technology, which ADI indicates will deliver improved energy efficiency and higher operating frequencies. Central to this new platform is the SHARC-FX core, a custom DSP architecture developed in collaboration with Cadence. This core provides a 5X performance boost over the previous-generation SHARC+ processor. This uplift is achieved through an enhanced VLIW SIMD architecture, more efficient cache operations, and an expanded instruction set capable of supporting a broader range of data types.
Beyond raw processing power, the ADSP-SC84x family introduces several infrastructure upgrades critical for modern automotive environments. These include an LPDDR4 memory interface and increased on-chip L2 memory to support data-heavy workloads. To address the security requirements of connected vehicles, the platform incorporates a dedicated hardware security module (HSM) for enhanced cybersecurity. Additionally, the platform offers two optional connectivity cores intended to provide improved communication and mainline Linux support. By combining these hardware advancements with Cadence’s optimized DSP IP, ADI is attempting to provide the deterministic real-time behavior required for safety-critical automotive applications while simultaneously enabling advanced AI/ML capabilities.
Optimizing AI Workloads via Tensilica IP
The integration of Cadence Tensilica IP allows ADI to implement custom instructions that accelerate proprietary audio and voice algorithms. This capability is particularly relevant as automotive manufacturers demand more sophisticated features, such as Personal Sound Zones (PSZ), immersive 3D audio, and Acoustic Vehicle Alerting Systems (AVAS). The SHARC-FX core is specifically optimized for on-chip AI/ML workloads, including music genre identification, music source separation (MSS), and real-time vocal removal. By enabling these tasks to run efficiently on the DSP, the architecture prevents the host CPU from becoming a bottleneck during complex processing tasks.
To facilitate the deployment of modern machine learning models, the SHARC-FX core supports optimized neural network (NN) kernel routines for frameworks such as Google’s LiteRT™. This allows developers to offload AI models to the DSP for high-performance, energy-efficient execution at the edge. This capability is essential for emerging applications like generative AI audio and intelligent voice assistants. The ecosystem is further supported by a suite of development tools, including Cadence’s compiler, ADI’s EZ-KIT® evaluation system, CrossCore® Embedded Studio, and DSP Concepts’ Audio Weaver framework. This integrated approach aims to simplify the transition from traditional signal processing to the more adaptive, AI-driven approaches currently defining the automotive sector.
Key Takeaways
- The new SHARC-FX processor core delivers 5X higher performance compared to the previous-generation SHARC+ processor.
- Analog Devices is transitioning its ADSP-SC84x/2184x platform from 28nm to 16nm process technology to improve energy efficiency.
- The architecture supports optimized NN kernel routines for AI/ML frameworks like Google’s LiteRT™ to enable edge-based audio inference.
TechInsyte's Take
In our view, Analog Devices’ collaboration with Cadence is a calculated response to the "intelligence explosion" occurring within the software-defined vehicle (SDV) ecosystem. As automotive architectures move away from isolated electronic control units toward centralized, high-performance computing, the bottleneck often shifts to how efficiently edge devices can process complex AI workloads without taxing the primary vehicle OS. By embedding Cadence’s Tensilica IP directly into the SHARC-FX core, ADI is not just upgrading a processor; they are attempting to secure a foothold in the high-margin niche of AI-augmented acoustic intelligence. The 5X performance jump and the move to 16nm suggest that ADI recognizes that traditional DSP capabilities are no longer sufficient to meet the dual demands of real-time deterministic safety and heavy-duty generative AI processing. This move signals a broader industry trend where specialized silicon must now bridge the gap between legacy signal processing and modern neural network execution.
Questions & Answers
How does the new SHARC-FX architecture improve power and performance efficiency?
The architecture achieves efficiency through a transition from 28nm to 16nm process technology, which provides higher operating frequencies and improved energy efficiency. Additionally, the SHARC-FX core utilizes an enhanced VLIW SIMD architecture and optimized cache operations to deliver a 5X performance increase over the previous SHARC+ generation.
What specific AI/ML capabilities are enabled by the integration of Cadence Tensilica IP?
The integration allows for the execution of on-chip AI/ML workloads such as music source separation (MSS), music genre identification, and real-time vocal removal. The architecture also supports optimized NN kernel routines for frameworks like Google’s LiteRT™, enabling real-time neural-network-based audio inference at the edge.
How does this new platform address automotive cybersecurity and connectivity requirements?
The ADSP-SC84x/2184x platform includes a dedicated hardware security module (HSM) to enhance cybersecurity. For connectivity, it offers two optional connectivity cores designed to provide enhanced communication and support for mainline Linux.
What is the strategic benefit of offloading AI workloads to the SHARC-FX core?
Offloading AI and signal-processing workloads to the SHARC-FX core allows the host CPU to remain dedicated to critical vehicle-domain and operating system functions. This prevents computational bottlenecks and ensures the deterministic real-time behavior required for automotive safety and stability.
Source: Businesswire
