Semiconductor IP providers are facing a mounting pressure to scale complex design outputs without a linear increase in specialized engineering headcount. eMemory, a provider of logic-based non-volatile memory (NVM), is addressing this bottleneck by deploying ChipAgents' agentic AI platform to automate its functional-model verification processes. By integrating this AI-native workflow into the development of its NeoFuse one-time-programmable (OTP) NVM IP, eMemory aims to compress the time required for datasheet analysis and testbench construction. This strategic shift seeks to transform manual, error-prone documentation reviews into a repeatable, automated pipeline, allowing a small verification team to maintain high-volume delivery schedules for over 40 IP products every month.
eMemory Reduces Verification Effort via ChipAgents Automation
The deployment of ChipAgents targets the most labor-intensive segments of the functional-model verification flow: datasheet analysis and the construction of verification testbenches. According to the company, the implementation reduced the engineering effort for these two stages by approximately 80%, cutting the estimated time required from four days down to just five hours. This automation is achieved through a three-stage workflow consisting of Datasheet Recognition, Datasheet Quality, and Testbench Generation. The system utilizes machine-readable rule decks to guide AI agents, ensuring that the extraction of structured information from technical documentation remains consistent and repeatable across different product lines.
During the evaluation of NeoFuse IP, ChipAgents processed 10 datasheets containing 120 tables, figures, and timing diagrams. The platform recorded zero mismatches when comparing extracted data against eMemory’s internal specification database. Furthermore, the system successfully identified 15 intentionally introduced datasheet errors—including parameter inconsistencies and missing descriptions—with zero false positives. Beyond mere error detection, the platform's ability to generate Universal Verification Methodology (UVM) testbenches and verification plans allowed eMemory to expand its testing capabilities. Specifically, the generated environment identified previously unconsidered scenarios, which increased verification test patterns by 18% and improved functional coverage by 5%.
Scaling IP Development Through Agentic AI Workflows
The transition toward agentic AI represents a shift from simple code generation to the orchestration of complex, cross-domain engineering tasks. For eMemory, the utility of ChipAgents extends beyond the controlled NeoFuse evaluation into broader production environments. The company deployed the Datasheet Quality workflow across 100 manually edited production datasheets, where the system identified five documentation issues, primarily involving spelling and unit-notation inconsistencies. By surfacing these errors early, the company aims to prevent documentation inaccuracies from propagating into later, more costly stages of the semiconductor development lifecycle.
This automation addresses a fundamental scaling challenge in the semiconductor industry, where the complexity of IP designs often outpaces the availability of qualified verification engineers. By automating the translation of complex specifications into verification-ready assets, eMemory is positioning its engineering team to focus on high-value decision-making rather than manual data entry and documentation review. The ability to turn technical datasheets into functional verification assets automatically provides a mechanism for maintaining quality at scale, even as the volume of IP products delivered each month remains high.
Key Takeaways
- eMemory reduced engineering effort for datasheet analysis and testbench construction by approximately 80%, moving from an estimated four days to five hours.
- The ChipAgents workflow increased verification test patterns by 18% and improved functional coverage by 5% for NeoFuse NVM IP.
- In testing, the platform identified 15 intentionally introduced datasheet errors with zero false positives across 10 NeoFuse datasheets.
TechInsyte's Take
In our view, the eMemory deployment signals a critical evolution in the application of generative AI within the semiconductor vertical. We are seeing a move away from "copilot" models that merely assist with syntax, toward "agentic" models that execute end-to-end engineering workflows. By automating the reasoning required to interpret datasheets and translate them into UVM testbenches, ChipAgents is tackling one of the most significant non-linear costs in chip design: the human bottleneck in verification. For enterprise IT and semiconductor leaders, the strategic implication is clear: the ability to scale IP production will increasingly depend on how effectively firms can integrate AI agents into the "reasoning" layers of their EDA (Electronic Design Automation) flows. This is not just about writing code faster; it is about automating the validation of the logic that governs the code itself.
Questions & Answers
How does the ChipAgents workflow impact the speed of IP verification cycles?
The workflow reduces the time spent on datasheet analysis and verification-testbench construction from an estimated four days to approximately five hours, representing an 80% reduction in engineering effort for those specific stages.
Can agentic AI improve the actual quality of the verification process, or does it only increase speed?
The deployment suggests it can improve both. eMemory reported an 18% increase in verification test patterns and a 5% improvement in functional coverage, as the AI-generated environments identified scenarios that had not been previously considered by engineers.
What specific types of errors can the ChipAgents Datasheet Quality workflow detect?
The system is designed to identify inconsistencies and documentation errors, such as parameter inconsistencies, spelling errors, missing descriptions, and unit-notation inconsistencies within technical datasheets.
How does this technology help small engineering teams manage high product volumes?
By automating the manual interpretation of datasheets and the creation of UVM testbenches, the platform allows a small, dedicated team to support the delivery of more than 40 IP products each month without a proportional increase in headcount.
Source: ChipAgents
